Access to the I/O devices through the peripheral bus is? (1 Point)
Slower than the system bus.
Faster than the system bus.
Similar to the system bus.
None of the above For transfer of data, devices inform the DMA through------?
(1 Point)
Bus request signal.
DRQ.
HLDA
DAK The number of address lines required to address 8 GB memory is....... (2 Points)
8
1024
32
33 The DMA transfers are performed by a control circuit called as __________
(1 Point)
Device interface
DMA controller
Data controller
Overlooker DMA transfers data between-------
(1 Point)
Memory and processor.
Processor and I/O devices.
I/O devices and memory.
All of the above A memory system of size 16 kbytes is required to be designed using memory chips which have 12 address lines and 4 data lines each.
No of chips required to design the memory system (2 Points)
8
12
16
4 A RAM chip has 7 address lines, 8 data lines and 2 chips select lines. Then the number of memory locations is (2 Points)
2^12
2^10
2^19
2^13
Access to the I/O devices through the peripheral bus is:
Answer: Faster than the system bus.
For transfer of data, devices inform the DMA through:
Answer: DRQ.
The number of address lines required to address 8 GB memory is:
Answer: 33.
The DMA transfers are performed by a control circuit called as:
Answer: DMA controller.
DMA transfers data between:
Answer: All of the above (Memory and processor, Processor and I/O devices, I/O devices and memory).
In a memory system of size 16 kbytes designed using memory chips which have 12 address lines and 4 data lines each, the number of chips required to design the memory system is:
Answer: 8.
A chip with 7 address lines, 8 data lines, and 2 chips select lines will have:
Answer: 2^12 memory locations.
I hope this helps! Let me know if you have any other questions.